The demand for high-speed data transmission continues to grow as device users become more accustomed to feature-rich electronic devices, high-quality digital media content, and high levels of system performance. For example, consumers demand ever more realistic audio and visual information in home and office applications. This in turn drives the need to move greater amounts of data (e.g., audio, video, 3D graphics and images) among electronic devices and across various types of networks. Thus, numerous techniques exist to move high-speed digital data both very short and very long distances. Moving data from integrated circuit to integrated circuit within an electronic device (e.g., high speed interconnects between integrated circuits), from board to board (e.g., connector and backplane applications), or from electronic device to electronic device generally requires high-performance solutions that consume low amounts of power, generate little noise, are relatively immune to external noise sources, and are cost-effective.
Because the high speed data transmission interface between integrated circuits is important in so many devices and applications, numerous different proprietary and standardized interfaces and communications techniques have been developed. Examples of such interfaces and techniques include: LVDS (low-voltage differential signaling, or low-voltage differential swing), mini-LVDS, PECL (positive-referenced emitter-coupled logic), CML (current mode logic), RSDS, (reduced swing differential signaling), LDT (lightning data transport), and the like. In particular LVDS, is commonly used among many integrated circuit designers and manufactures because it is the subject of TIA/ANSI standards, is relatively easy to implement, can be implemented in CMOS, GaAs or other applicable technologies, can migrate from 5V to 3.3V to sub-3V supplies, and can be transmitted over PCB traces or cables, thereby serving a broad range of applications in many industry segments.
An LVDS output driver includes differential output terminals coupled to a current source (nominal 3.5 mA) that drives a differential pair of signal transmission lines. The basic input driver or receiver has a high DC input impedance, so the majority of driver current flows across a termination resistor, generating about 350 mV across the receiver inputs. When the output driver switches, it changes the direction of current flow across the resistor, thereby creating a valid “one” or “zero” logic state.
In typical LVDS implementations, operation is specified in terms of two key parameters, VOD and VOS. VOD is the voltage difference or swing between the two output terminals of the output driver. VOS is the average level of the two output voltage signals. In general, VOS is determined by the equilibrium of pull up and pull down current sources implemented in the output driver. Stronger pull up/weaker pull down tends to raise VOS, while weaker pull up/stronger pull down tends to lower VOS. Signaling on the two output terminals is controlled by an array of switched between the pull up and pull down current sources.
Despite its relative simplicity, an LVDS implementation can have several disadvantages. Careful control of the pull up and pull down currents typically requires the use of multiple switches in each current source, and controlling those switches in turn requires ample memory and control circuitry. In many integrated circuits, the added cost (e.g., actual cost or consumption of circuit resources) can be high. Additionally, VOD and VOS can vary significantly due to semiconductor manufacturing process, operation temperature, and supply voltage variation. This is largely because the pull up and pull down currents vary significantly over the full range of process/temperature/supply variation. The variation of VOD and VOS can be great enough to push a device beyond the operation specifications of LVDS standards. Finally, typical LVDS implementations do not compensate for supply voltage and ground bounces, which may further cause VOS and VOD to shift.
Accordingly, it is desirable to integrated circuit I/O interfaces and techniques that reduce or eliminate many of the deficiencies of the prior art.